Asymmetric Multiprocessing (AMP) Runtime on StarFive JH7110 SoC (VisionFive 2)
- JIT Compiler Engine: Engineered a bare-metal Just-In-Time compiler translating eBPF bytecode into native RV64IMA machine code; achieved ultra-low program activation (~33.7 µs) and sub-microsecond control plane latencies, executing safely without an underlying OS.
- AMP Firmware & Hardware Integration: Deployed an isolated RISC-V compute core booted via OpenSBI HSM into reserved physical DRAM (16 MB); implemented explicit I-cache/D-cache coherency (`fence.i`) and zero-overhead memory mappings for deterministic execution (±0.18% jitter).
- NVMe TP4091 & SLM Emulation: Modeled next-gen NVMe Computational Storage (TP4091/SLM) protocols using shared-memory ring buffers (SQ/CQ) between Linux and the bare-metal worker, featuring double-buffered asynchronous execution pipelines.
- Performance & I/O Scaling: Evaluated on physical NVMe storage and emulated low-latency ONFI Flash buses, achieving up to 6.5x end-to-end speedup over host processing by filtering data in-storage and cutting host PCIe traffic by 99.7%.